Use BIT() macro. Clean up lane count handling for non-4-lane panels. Implement support for DSI command transfer mode using register based access, with maximum payload length of 16 Bytes in Long Packet. Marek Vasut (4): drm/rcar-du: dsi: Convert register bits to BIT() macro drm/rcar-du: dsi: Remove fixed PPI lane count setup drm/rcar-du: dsi: Configure TXSETR register to match PPI lane count drm/rcar-du: dsi: Implement DSI command support .../gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 220 ++++++++++++++++- .../drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 226 ++++++++++++++---- 2 files changed, 395 insertions(+), 51 deletions(-) --- Cc: David Airlie <airlied@xxxxxxxxx> Cc: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> Cc: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx> Cc: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> Cc: Magnus Damm <magnus.damm@xxxxxxxxx> Cc: Maxime Ripard <mripard@xxxxxxxxxx> Cc: Simona Vetter <simona@xxxxxxxx> Cc: Thomas Zimmermann <tzimmermann@xxxxxxx> Cc: Tomi Valkeinen <tomi.valkeinen+renesas@xxxxxxxxxxxxxxxx> Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx Cc: linux-renesas-soc@xxxxxxxxxxxxxxx -- 2.47.2