On Fri, May 30, 2025 at 03:31:31PM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Document support for the I2C Bus Interface (RIIC) found on the Renesas > RZ/T2H (R9A09G077) SoC. The RIIC IP on this SoC is similar to that on > the RZ/V2H(P) SoC but supports fewer interrupts, lacks FM+ support and > does not require resets. Due to these differences, add a new compatible > string `renesas,riic-r9a09g077` for the RZ/T2H SoC. > > Unlike earlier SoCs that use eight distinct interrupts, the RZ/T2H uses > only four, including a combined error/event interrupt. Update the binding > schema to reflect this interrupt layout and skip the `resets` property > check, as it is not required on these SoCs. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
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