On Thu, Jul 03, 2025 at 05:53:10PM GMT, Jim Quinlan wrote: > This series enables a new SoC to run with the existing Brcm STB PCIe > driver. Previous chips all required that an inbound window have a size > that is a power of two; this chip, and next generations chips like it, can > have windows of any reasonable size. > > Note: This series must follow the commits of two previous and pending > series [1,2]. > > [1] https://lore.kernel.org/linux-pci/20250613220843.698227-1-james.quinlan@xxxxxxxxxxxx/ > [2] https://lore.kernel.org/linux-pci/20250609221710.10315-1-james.quinlan@xxxxxxxxxxxx/ Have you considered my comment on this series? https://lore.kernel.org/linux-pci/a2ebnh3hmcbd5zr545cwu7bcbv6xbhvv7qnsjzovqbkar5apak@kviufeyk5ssr/ - Mani -- மணிவண்ணன் சதாசிவம்
