Re: [PATCH 3/3] PCI: brcmstb: Add 74110a0 SoC configuration details

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On 7/3/2025 2:53 PM, Jim Quinlan wrote:
Enable PCIe for 74110a0 SoC.  This chip uses a simple mechanism
to map inbound memory regions.  Both the "ranges" and "dma-ranges"
are identity-mapped to PCIe space.

Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>

Reviewed-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>

---
  drivers/pci/controller/pcie-brcmstb.c | 21 ++++++++++++++++++++-
  1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 362ac083e112..bfedab15a162 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -276,6 +276,7 @@ enum pcie_soc_base {
  	BCM7435,
  	BCM7712,
  	BCM33940,
+	BCM74110,
  };
/*
@@ -291,7 +292,7 @@ enum pcie_soc_base {
   * power of two.  Such systems may or may not have an IOMMU between the RC
   * and memory.
   */
-#define IS_NG_PCI_SOC(t) (0)
+#define IS_NG_PCI_SOC(t) ((t) == BCM74110)
struct inbound_win {
  	u64 size;
@@ -2046,6 +2047,14 @@ static const int pcie_offsets_bcm7712[] = {
  	[PCIE_INTR2_CPU_BASE]	= 0x4400,
  };
+static const int pcie_offset_bcm74110[] = {
+	[RGR1_SW_INIT_1] = 0xc010,
+	[EXT_CFG_INDEX]  = 0x9000,
+	[EXT_CFG_DATA]   = 0x8000,
+	[PCIE_HARD_DEBUG] = 0x4204,
+	[PCIE_INTR2_CPU_BASE] = 0x4300,
+};
+
  static const int pcie_offset_bcm33940[] = {
  	[RGR1_SW_INIT_1] = 0x9210,
  	[EXT_CFG_INDEX] = 0x9000,
@@ -2162,6 +2171,15 @@ static const struct pcie_cfg_data bcm33940_cfg = {
  	.num_inbound_wins = 10,
  };
+static const struct pcie_cfg_data bcm74110_cfg = {
+	.offsets	= pcie_offset_bcm74110,
+	.soc_base	= BCM74110,
+	.perst_set	= brcm_pcie_perst_set_7278,
+	.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
+	.has_phy	= true,
+	.has_err_report	= true,
+};
+
  static const struct of_device_id brcm_pcie_match[] = {
  	{ .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
  	{ .compatible = "brcm,bcm2712-pcie", .data = &bcm2712_cfg },
@@ -2177,6 +2195,7 @@ static const struct of_device_id brcm_pcie_match[] = {
  	{ .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg },
  	{ .compatible = "brcm,bcm7712-pcie", .data = &bcm7712_cfg },
  	{ .compatible = "brcm,bcm33940-pcie", .data = &bcm33940_cfg },
+	{ .compatible = "brcm,bcm74110-pcie", .data = &bcm74110_cfg },

Nit: if you need to respin, it might be nice to order numerically here?
--
Florian





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