From: Keith Busch <kbusch@xxxxxxxxxx> Synchronize the interrupt to ensure the reset isn't going to disrupt a previously pending handler from igoring the reset's link flap. Back to back secondary bus resets create a window when the previous reset proceeds with DLLLA, waking the pending pciehp interrupt thread, but the subsequent reset tears it down while the irq thread tries to confirm the link is active, triggering unexpected re-enumeration. Fixes: bbf10cd686835d5 ("PCI: pciehp: Ignore belated Presence Detect Changed caused by DPC") Cc: Lukas Wunner <lukas@xxxxxxxxx> Signed-off-by: Keith Busch <kbusch@xxxxxxxxxx> --- drivers/pci/hotplug/pciehp_hpc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index bcc51b26d03d5..f27ff20a3c34c 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -946,6 +946,7 @@ int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, bool probe) down_write_nested(&ctrl->reset_lock, ctrl->depth); + synchronize_irq(ctrl->pcie->irq); pci_hp_ignore_link_change(pdev); rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port); -- 2.47.3