Hi Frank,
Thanks for your patch, and sorry reply was too late.
> -----Original Message-----
> From: Frank Li <Frank.Li@xxxxxxx>
> Sent: Saturday, June 14, 2025 6:33 AM
> To: iwamatsu nobuhiro(岩松 信洋 □ＤＩＴＣ○ＣＰＴ)
> <nobuhiro1.iwamatsu@xxxxxxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>;
> Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley
> <conor+dt@xxxxxxxxxx>; Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx>; Krzysztof
> Wilczyński <kwilczynski@xxxxxxxxxx>; Manivannan Sadhasivam
> <mani@xxxxxxxxxx>; Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx; Frank Li
> <Frank.Li@xxxxxxx>
> Subject: [PATCH RFT 1/2] arm64: dts: toshiba: Update SoC and PCIe ranges to
> reflect hardware behavior
>
> tmpv7708 trim address bit[31:30] in tmpv7708 before passing to the PCIe
> controller. So add a 'ranges' entry under the parent bus 'soc' to map address 0x0
> to 0x40000000.
>
> Update the PCIe node's 'config' and 'ranges' properties to use the real upstream
> bus address.
>
> Ensure there is no functional impact on the final address translation result.
>
> Prepare for the removal of the driver’s cpu_addr_fixup().
>
> Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
> ---
> arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
> b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
> index 39806f0ae5133..2a18aa93d4723 100644
> --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
> +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
> @@ -147,7 +147,15 @@ soc {
> #size-cells = <2>;
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> - ranges;
> + ranges = /* register 1:1 map */
> + <0x0 0x24000000 0x0 0x24000000 0x0 0x10000000>,
> + /*
> + * bus fabric mask address bit 30 and 31 to 0
> + * before send to PCIe controller.
> + *
> + * PCIe map address 0 to cpu's 0x40000000
> + */
> + <0x0 0x00000000 0x0 0x40000000 0x0 0x40000000>;
>
> gic: interrupt-controller@24001000 {
> compatible = "arm,gic-400";
> @@ -481,7 +489,7 @@ pwm: pwm@241c0000 {
> pcie: pcie@28400000 {
> compatible = "toshiba,visconti-pcie";
> reg = <0x0 0x28400000 0x0 0x00400000>,
> - <0x0 0x70000000 0x0 0x10000000>,
> + <0x0 0x30000000 0x0 0x10000000>,
If my understanding is correct, this setting conflicts with the address space this patch changed
ranges above. Therefore, it does not work.
0x24000000 + 0x10000000 > 0x30000000
By reducing 0x10000000 to 0xc000000, it will fit within the 0x30000000 range.
And by adding the following to the driver:
```
pci->use_parent_dt_ranges = true;
```
the PCIe will work, but this setting prevents access to devices located after 0x30000000.
Is there any other DT method to avoid this?
Best regards,
Nobuhiro
