On Sun, 2025-04-27 at 20:53 +0800, Hans Zhang wrote:
> Link-up detection manually checked PCIE_LINKUP bits across RC/EP
> modes,
> leading to code duplication. Centralize the logic using FIELD_GET.
> This
> removes redundancy and abstracts hardware-specific bit masking,
> ensuring
> consistent link state handling.
>
> Signed-off-by: Hans Zhang <18255117159@xxxxxxx>
> Reviewed-by: Niklas Cassel <cassel@xxxxxxxxxx>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 21 +++++++----------
> --
> 1 file changed, 8 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index a778f4f61595..bfc47dab32e5 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -8,6 +8,7 @@
> * Author: Simon Xue <xxm@xxxxxxxxxxxxxx>
> */
>
> +#include <linux/bitfield.h>
> #include <linux/clk.h>
> #include <linux/gpio/consumer.h>
> #include <linux/irqchip/chained_irq.h>
> @@ -60,9 +61,8 @@
>
> /* LTSSM Status Register */
> #define PCIE_CLIENT_LTSSM_STATUS 0x300
> -#define PCIE_SMLH_LINKUP BIT(16)
> -#define PCIE_RDLH_LINKUP BIT(17)
> -#define PCIE_LINKUP (PCIE_SMLH_LINKUP |
> PCIE_RDLH_LINKUP)
> +#define PCIE_LINKUP 0x3
> +#define PCIE_LINKUP_MASK GENMASK(17, 16)
> #define PCIE_LTSSM_STATUS_MASK GENMASK(5, 0)
>
> struct rockchip_pcie {
> @@ -188,10 +188,7 @@ static int rockchip_pcie_link_up(struct dw_pcie
> *pci)
> struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> u32 val = rockchip_pcie_get_ltssm(rockchip);
>
> - if ((val & PCIE_LINKUP) == PCIE_LINKUP)
> - return 1;
> -
> - return 0;
> + return FIELD_GET(PCIE_LINKUP_MASK, val) == PCIE_LINKUP;
> }
>
> static void rockchip_pcie_enable_l0s(struct dw_pcie *pci)
> @@ -450,7 +447,7 @@ static irqreturn_t
> rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
> struct dw_pcie *pci = &rockchip->pci;
> struct dw_pcie_rp *pp = &pci->pp;
> struct device *dev = pci->dev;
> - u32 reg, val;
> + u32 reg;
>
> reg = rockchip_pcie_readl_apb(rockchip,
> PCIE_CLIENT_INTR_STATUS_MISC);
> rockchip_pcie_writel_apb(rockchip, reg,
> PCIE_CLIENT_INTR_STATUS_MISC);
> @@ -459,8 +456,7 @@ static irqreturn_t
> rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
> dev_dbg(dev, "LTSSM_STATUS: %#x\n",
> rockchip_pcie_get_ltssm(rockchip));
>
> if (reg & PCIE_RDLH_LINK_UP_CHGED) {
> - val = rockchip_pcie_get_ltssm(rockchip);
> - if ((val & PCIE_LINKUP) == PCIE_LINKUP) {
> + if (rockchip_pcie_link_up(pci)) {
> dev_dbg(dev, "Received Link up event.
> Starting enumeration!\n");
> /* Rescan the bus to enumerate endpoint
> devices */
> pci_lock_rescan_remove();
> @@ -477,7 +473,7 @@ static irqreturn_t
> rockchip_pcie_ep_sys_irq_thread(int irq, void *arg)
> struct rockchip_pcie *rockchip = arg;
> struct dw_pcie *pci = &rockchip->pci;
> struct device *dev = pci->dev;
> - u32 reg, val;
> + u32 reg;
>
> reg = rockchip_pcie_readl_apb(rockchip,
> PCIE_CLIENT_INTR_STATUS_MISC);
> rockchip_pcie_writel_apb(rockchip, reg,
> PCIE_CLIENT_INTR_STATUS_MISC);
> @@ -491,8 +487,7 @@ static irqreturn_t
> rockchip_pcie_ep_sys_irq_thread(int irq, void *arg)
> }
>
> if (reg & PCIE_RDLH_LINK_UP_CHGED) {
> - val = rockchip_pcie_get_ltssm(rockchip);
> - if ((val & PCIE_LINKUP) == PCIE_LINKUP) {
> + if (rockchip_pcie_link_up(pci)) {
> dev_dbg(dev, "link up\n");
> dw_pcie_ep_linkup(&pci->ep);
> }
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@xxxxxxx>
