On Thu, 3 Jul 2025 18:45:21 +0300 Andy Shevchenko <andriy.shevchenko@xxxxxxxxx> wrote: > On Thu, Jul 03, 2025 at 04:59:50PM +0200, Lothar Rubusch wrote: > > On Thu, Jul 3, 2025 at 4:26 PM Andy Shevchenko > > <andriy.shevchenko@xxxxxxxxx> wrote: > > > On Wed, Jul 02, 2025 at 11:03:11PM +0000, Lothar Rubusch wrote: > > ... > > > > > #define ADXL345_REG_TAP_SUPPRESS_MSK BIT(3) > > > > #define ADXL345_REG_TAP_SUPPRESS BIT(3) > > > > #define ADXL345_REG_ACT_AXIS_MSK GENMASK(6, 4) > > > > +#define ADXL345_REG_INACT_AXIS_MSK GENMASK(2, 0) > > > > +#define ADXL345_POWER_CTL_INACT_MSK (ADXL345_POWER_CTL_AUTO_SLEEP | ADXL345_POWER_CTL_LINK) > > > > > > > > #define ADXL345_TAP_Z_EN BIT(0) > > > > #define ADXL345_TAP_Y_EN BIT(1) > > > > #define ADXL345_TAP_X_EN BIT(2) > > > > > > > > +#define ADXL345_INACT_Z_EN BIT(0) > > > > +#define ADXL345_INACT_Y_EN BIT(1) > > > > +#define ADXL345_INACT_X_EN BIT(2) > > > > +#define ADXL345_INACT_XYZ_EN (ADXL345_INACT_Z_EN | ADXL345_INACT_Y_EN | ADXL345_INACT_X_EN) > > > > + > > > > #define ADXL345_ACT_Z_EN BIT(4) > > > > #define ADXL345_ACT_Y_EN BIT(5) > > > > #define ADXL345_ACT_X_EN BIT(6) > > > > > > Now it's even more mess. I am lost in understanding which bits/masks are from > > > the same offset and which are not. > > > > > > > I'm sorry for that. I mean, while the above is supposed to make it > > clear where the "values" are coming from, I also could setup something > > like the following which is shorter. > > +#define ADXL345_INACT_XYZ_EN GENMASK(2,0) > > +#define ADXL345_ACT_XYZ_EN GENMASK(6,4) Definitely not for those. They aren't a mask, but rather 3 only somewhat related bits. > > > > As I understand you, you'd rather prefer to see the latter one in the kernel? > > My personal preference can be found, for example, in > drivers/pinctrl/intel/pinctrl-intel.c. But I'm not insisting to use > _my_ schema. Just find a way how to group them semantically. >
