On Thu, 08 May 2025, Krzysztof Kozlowski wrote: > On 07/05/2025 17:24, Ivan Vecera wrote: > > Add a common DT schema for DPLL device and its associated pins. > > The DPLL (device phase-locked loop) is a device used for precise clock > > synchronization in networking and telecom hardware. > > > > The device includes one or more DPLLs (channels) and one or more > > physical input/output pins. > > > One patchset per 24h. You already sent it today and immediately send > next version without giving time for any actual review. I just came by to say exactly the same. There is no rush. Please slow down. This is not going to be applied for v6.16 and there is much to discuss. -- Lee Jones [李琼斯]
