On 07/05/2025 17:24, Ivan Vecera wrote: > Add a common DT schema for DPLL device and its associated pins. > The DPLL (device phase-locked loop) is a device used for precise clock > synchronization in networking and telecom hardware. > > The device includes one or more DPLLs (channels) and one or more > physical input/output pins. > One patchset per 24h. You already sent it today and immediately send next version without giving time for any actual review. Best regards, Krzysztof
