On Thu, Apr 24, 2025 at 10:11:01AM +0200, Christoph Hellwig wrote: > On Thu, Apr 24, 2025 at 11:07:44AM +0300, Leon Romanovsky wrote: > > > I see, so yes order occupies 5 bits [-4,-5,-6,-7,-8] and the > > > DMA_MAPPED overlaps, it should be 9 not 7 because of the backwardness. > > > > Thanks for the fix. > > Maybe we can use the chance to make the scheme less fragile? i.e. > put flags in the high bits and derive the first valid bit from the > pfn order? > It can be done too. This is what I got: 38 enum hmm_pfn_flags { 39 /* Output fields and flags */ 40 HMM_PFN_VALID = 1UL << (BITS_PER_LONG - 1), 41 HMM_PFN_WRITE = 1UL << (BITS_PER_LONG - 2), 42 HMM_PFN_ERROR = 1UL << (BITS_PER_LONG - 3), 43 /* 44 * Sticky flags, carried from input to output, 45 * don't forget to update HMM_PFN_INOUT_FLAGS 46 */ 47 HMM_PFN_DMA_MAPPED = 1UL << (BITS_PER_LONG - 4), 48 HMM_PFN_P2PDMA = 1UL << (BITS_PER_LONG - 5), 49 HMM_PFN_P2PDMA_BUS = 1UL << (BITS_PER_LONG - 6), 50 51 HMM_PFN_ORDER_SHIFT = (BITS_PER_LONG - 11), 52 53 /* Input flags */ 54 HMM_PFN_REQ_FAULT = HMM_PFN_VALID, 55 HMM_PFN_REQ_WRITE = HMM_PFN_WRITE, 56 57 HMM_PFN_FLAGS = ~((1UL << HMM_PFN_ORDER_SHIFT) - 1), 58 }; So now, we just need to move HMM_PFN_ORDER_SHIFT if we add new flags and HMM_PFN_FLAGS will be updated automatically. Thanks