On Wed, Apr 23, 2025 at 09:37:24PM +0300, Mika Penttilä wrote: > > On 4/23/25 21:17, Jason Gunthorpe wrote: > > On Wed, Apr 23, 2025 at 08:54:05PM +0300, Mika Penttilä wrote: > >>> @@ -36,6 +38,13 @@ enum hmm_pfn_flags { > >>> HMM_PFN_VALID = 1UL << (BITS_PER_LONG - 1), > >>> HMM_PFN_WRITE = 1UL << (BITS_PER_LONG - 2), > >>> HMM_PFN_ERROR = 1UL << (BITS_PER_LONG - 3), > >>> + > >>> + /* > >>> + * Sticky flags, carried from input to output, > >>> + * don't forget to update HMM_PFN_INOUT_FLAGS > >>> + */ > >>> + HMM_PFN_DMA_MAPPED = 1UL << (BITS_PER_LONG - 7), > >>> + > >> How is this playing together with the mapped order usage? > > Order shift starts at bit 8, DMA_MAPPED is at bit 7 > > hmm bits are the high bits, and order is 5 bits starting from > (BITS_PER_LONG - 8) I see, so yes order occupies 5 bits [-4,-5,-6,-7,-8] and the DMA_MAPPED overlaps, it should be 9 not 7 because of the backwardness. Probably testing didn't hit this because the usual 2M order of 9 only sets bits -4 and -8 .. The way the order works it doesn't clear the 0 bits, which I wonder if is a little bug.. Jason