On Wed, 09 Jul 2025 12:08:52 +0200, Stephan Gerhold wrote:
> In preparation of adding iris (video acceleration) for Qualcomm X1E80100,
> enable support for the video clock controller and additional needed reset
> controls. Since iris in X1E is largely identical to SM8550, reuse the
> existing videocc-sm8550 driver with slightly adjusted PLL frequencies and
> adapt the reset definitions from the SM8550 GCC driver.
>
>
> [...]
Applied, thanks!
[1/6] dt-bindings: clock: qcom,sm8450-videocc: Document X1E80100 compatible
commit: 3b4e2820e1a5889c3eff274780137c61cecdab2b
[2/6] clk: qcom: videocc-sm8550: Allow building without SM8550/SM8560 GCC
commit: b7b0799f0d9f4c6f5ca8b1ee63bc9e961a326f9c
[3/6] clk: qcom: videocc-sm8550: Add separate frequency tables for X1E80100
commit: 92640a6d4a4f59137867b7025d54cbbf7f23f89e
[4/6] dt-bindings: clock: qcom,x1e80100-gcc: Add missing video resets
commit: d0b706509fb04449add5446e51a494bfeadcac10
[5/6] clk: qcom: gcc-x1e80100: Add missing video resets
commit: eb1af6ee4874dd15e52f38216dfd6a2b12d595da
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
