On Thu, Mar 20, 2025 at 05:41:14PM +0000, Jonathan Cameron wrote:
> +struct system_cache_flush_method {
> + int (*invalidate_memregion)(int res_desc,
> + phys_addr_t start, size_t len);
> +};
[...]
> +int cpu_cache_invalidate_memregion(int res_desc, phys_addr_t start, size_t len)
> +{
> + guard(spinlock_irqsave)(&scfm_lock);
> + if (!scfm_data)
> + return -EOPNOTSUPP;
> +
> + return scfm_data->invalidate_memregion(res_desc, start, len);
> +}
WBINVD on x86 deals with the CPU caches as well. Even the API naming in
Linux implies CPU caches. IIUC, devices registering to the above on Arm
SoCs can only deal with system caches. Is it sufficient?
--
Catalin
