On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote:
> When handeling traps and faults it is offten necessary to know the size
handling
often
> of the instruction at epc. Add RV_INSN_LEN to calculate the
> instruction size.
>
> Signed-off-by: Jesse Taube <jesse@xxxxxxxxxxxx>
> ---
> lib/riscv/asm/processor.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h
> index 40104272..631ce226 100644
> --- a/lib/riscv/asm/processor.h
> +++ b/lib/riscv/asm/processor.h
> @@ -7,6 +7,8 @@
> #define EXCEPTION_CAUSE_MAX 24
> #define INTERRUPT_CAUSE_MAX 16
>
> +#define RV_INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4)
> +
> typedef void (*exception_fn)(struct pt_regs *);
>
> struct thread_info {
> --
> 2.43.0
>
I've fixed the two typos while applying to riscv/sbi[1]
[1] https://gitlab.com/jones-drew/kvm-unit-tests/-/commits/riscv/sbi
Thanks,
drew
>
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