On Thu, Mar 13, 2025, Yosry Ahmed wrote: > On Fri, Feb 21, 2025 at 04:33:49PM +0000, Yosry Ahmed wrote: > > To properly virtualize IBRS on Intel, an IBPB is executed on emulated > > VM-exits to provide separate predictor modes for L1 and L2. > > > > Similar handling is theoretically needed for AMD, unless IbrsSameMode is > > enumerated by the CPU (which should be the case for most/all CPUs > > anyway). For correctness and clarity, this series generalizes the > > handling to apply for both Intel and AMD as needed. > > > > I am not sure if this series would land through the kvm-x86 tree or the > > tip/x86 tree. > > Sean, any thoughts about this (or general feedback about this series)? No feedback, I just you and Jim to get mitigation stuff right far more than I trust myself :-) I'm planning on grabbing this for 6.16.
