Hi Christoph!
>> For PCIe transport devices maybe we could consider adding an additional
>> heuristic based on something like PLP or VWC?
>
> What would you check there? Atomic writes work perfectly fine if not
> better with volatile write caches.
What I propose is making sure we only enable atomics when several
independent device-reported values line up and are mutually consistent.
Just like we do in SCSI.
Maybe something like this:
if (NSFEAT & NSABP &&
is_power_of_2(NAWUPF) &&
NAWUPF <= NAWUN &&
NAWUPF <= MDTS &&
NAWUPF % NPWG == 0)
It would be good to have more Identify Controller data in there to
validate against. But since we want to fix up AWUN and AWUPF in the
spec, we shouldn't depend on those.
I just wonder if there is something else from either PCIe config space
or Identify Controller we could add to weed out rando consumer devices
that seed their Identify buffers with garbage. A heuristic like "you
wouldn't possibly want to enable atomics unless the drive also supported
feature XYZ"...
--
Martin K. Petersen
