i played already with big endian platforms and ath11k (not ath12k) for
months. there is also a problem with the dma descriptors. the firmware
simply doesnt support big endian with host communication at the end even
if there is a endian flag for the firmware. dont get into this rabit
hole. (i worked 3 months on it and gave up)
at the end (i was working on a cavium octeon platform at that time) i
just switched the kernel boot to little endian which is possible on many
ppc platforms too.
Am 15.08.2025 um 10:13 schrieb Alexander Wilhelm:
Hello devs,
I'm currently working on getting the 'ath12k' driver running on a big endian
PowerPC platform and have encountered the following issue.
In the function 'ath12k_dp_rx_process_reo_status', the REO status is determined
by inspecting memory that the hardware has previously written via DMA.
Specifically, during the call to 'ath12k_hal_srng_access_begin', the driver
reads the value of 'hp_addr' for the destination ring (in my case, always with
ID 21). On the big endian platform, this value is consistently 0, which prevents
the REO status from being updated.
Interestingly, DMA read/write accesses work fine for other rings, just not for
this one. What makes the REO status ring so special? I couldn’t find anything in
the initialization routine that would explain the difference.
Could anyone give me a hint on what I should be looking for?
Best regards
Alexander Wilhelm
