From: Quentin Schulz <quentin.schulz@xxxxxxxxx> The u2phy1_host port is the part of the USB PHY1 (namely the HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG controller (dwc3), which we do use. The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply disable the USB2.0 controllers and associated part in USB2.0 PHY. No intended functional change. [1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf Chapter 2 USB2.0 PHY Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Quentin Schulz <quentin.schulz@xxxxxxxxx> Signed-off-by: Lukasz Czechowski <lukasz.czechowski@xxxxxxxxxxxxx> --- arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi index dd5a9bca26d1d221607e73071685d5774330d760..5c1162e2f34f9c9786da1f774dffa71adda23dbc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -579,10 +579,6 @@ &u2phy1 { u2phy1_otg: otg-port { status = "okay"; }; - - u2phy1_host: host-port { - status = "okay"; - }; }; &usbdrd3_1 { @@ -616,11 +612,3 @@ hub_3_0: hub@2 { vdd2-supply = <&vcc3v3_sys>; }; }; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; -- 2.43.0
