The firmware exposes clocks that can be controlled via the ACPM
interface. Describe the clocks exposed by the APM firmware.
Signed-off-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxx>
---
.../bindings/firmware/google,gs101-acpm-ipc.yaml | 28 ++++++++++++++++++++++
include/dt-bindings/clock/google,gs101.h | 15 ++++++++++++
2 files changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
index 9785aac3b5f34955bbfe2718eec48581d050954f..27cdf9c881ca680e78e77a0e14ffcffeba970871 100644
--- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
+++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
@@ -27,6 +27,29 @@ properties:
mboxes:
maxItems: 1
+ clocks:
+ description:
+ Clocks that are variable and index based. These clocks don't provide
+ an entire range of values between the limits but only discrete points
+ within the range. The firmware also manages the voltage scaling
+ appropriately with the clock scaling.
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ const: google,gs101-acpm-dvfs-clocks
+
+ "#clock-cells":
+ const: 1
+ description:
+ The argument is the ID of the clock contained by the firmware
+ messages.
+
+ required:
+ - compatible
+ - "#clock-cells"
+
pmic:
description: Child node describing the main PMIC.
type: object
@@ -59,6 +82,11 @@ examples:
mboxes = <&ap2apm_mailbox>;
shmem = <&apm_sram>;
+ clocks {
+ compatible = "google,gs101-acpm-dvfs-clocks";
+ #clock-cells = <1>;
+ };
+
pmic {
compatible = "samsung,s2mpg10-pmic";
interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h
index 442f9e9037dc33198a1cee20af62fc70bbd96605..f1d0df412fdd49b300db4ba88bc0b1674cf0cdf8 100644
--- a/include/dt-bindings/clock/google,gs101.h
+++ b/include/dt-bindings/clock/google,gs101.h
@@ -634,4 +634,19 @@
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45
#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46
+#define CLK_ACPM_DVFS_MIF 0
+#define CLK_ACPM_DVFS_INT 1
+#define CLK_ACPM_DVFS_CPUCL0 2
+#define CLK_ACPM_DVFS_CPUCL1 3
+#define CLK_ACPM_DVFS_CPUCL2 4
+#define CLK_ACPM_DVFS_G3D 5
+#define CLK_ACPM_DVFS_G3DL2 6
+#define CLK_ACPM_DVFS_TPU 7
+#define CLK_ACPM_DVFS_INTCAM 8
+#define CLK_ACPM_DVFS_TNR 9
+#define CLK_ACPM_DVFS_CAM 10
+#define CLK_ACPM_DVFS_MFC 11
+#define CLK_ACPM_DVFS_DISP 12
+#define CLK_ACPM_DVFS_BO 13
+
#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */
--
2.51.0.rc1.167.g924127e9c0-goog
