Hi Krzysztof, Thanks for the review. > > Explain the hardware. I'll explain in the next patchset. > > > > > Signed-off-by: Inbaraj E <inbaraj.e@xxxxxxxxxxx> > > --- > > .../bindings/media/nxp,imx-mipi-csi2.yaml | 88 ++++++++++++++----- > > 1 file changed, 68 insertions(+), 20 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml > > b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml > > index 03a23a26c4f3..802fb1bd150d 100644 > > --- a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml > > +++ b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml > > @@ -14,7 +14,7 @@ description: |- > > The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2 > > receiver IP core named CSIS. The IP core originates from Samsung, and > may be > > compatible with some of the Exynos4 and S5P SoCs. i.MX7 SoCs use > > CSIS version > > - 3.3, and i.MX8 SoCs use CSIS version 3.6.3. > > + 3.3, i.MX8 SoCs use CSIS version 3.6.3 and FSD SoC uses CSIS version 4.3. > > > > While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY > is > > completely wrapped by the CSIS and doesn't expose a control > > interface of its @@ -26,6 +26,7 @@ properties: > > - enum: > > - fsl,imx7-mipi-csi2 > > - fsl,imx8mm-mipi-csi2 > > + - tesla,fsd-mipi-csi2 > > > Isn't this Samsung CSI IP? Yes, it is Samsung CSI IP. Why are you adding it to NXP? Samsung CSIS IP core present in Exynos(samsung/exynos4-is/mipi-csis.c) series is completely different from the one in the Tesla FSD SoC. However, it is compatible with the samsung CSIS IP used in the NXP SoC. For better code reusability, I am integrating it with the NXP imx-mipi-csis driver. > Nothing in commit, msg helps me to understand that. I'll explain the same in commit description as well. > > > - items: > > - enum: > > - fsl,imx8mp-mipi-csi2 > > @@ -38,24 +39,21 @@ properties: > > maxItems: 1 > > > > clocks: > > - minItems: 3 > > - items: > > - - description: The peripheral clock (a.k.a. APB clock) > > - - description: The external clock (optionally used as the pixel clock) > > - - description: The MIPI D-PHY clock > > - - description: The AXI clock > > + minItems: 2 > > + maxItems: 4 > > > > clock-names: > > - minItems: 3 > > - items: > > - - const: pclk > > - - const: wrap > > - - const: phy > > - - const: axi > > + minItems: 2 > > + maxItems: 4 > > > > power-domains: > > maxItems: 1 > > > > + samsung,syscon-csis: > > samsung, so not nxp. Even more confusing. > I used samsung,syscon-csis because the system controller on Tesla FSD follows Samsung's sysreg design. > > Best regards, > Krzysztof Regards, Inbaraj E
