Add missing address-cells 0 to GIC interrupt node. Value '0' is correct
because GIC interrupt controller does not have children.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
index 6b5ac02d010f..b1fe315b40fd 100644
--- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
@@ -273,6 +273,7 @@ gic: interrupt-controller@10200000 {
reg = <0x0 0x10200000 0x0 0x10000>, /* GICD */
<0x0 0x10240000 0x0 0x200000>; /* GICR * 8 */
+ #address-cells = <0>;
#interrupt-cells = <4>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
--
2.48.1
