[PATCH] watchdog: s3c2410: Add FSD support

[Varada Pavani <v.pavani@xxxxxxxxxxx>]

FSD SoC has 3 CPU clusters, each has its own WDT instance.
PMU register bits(.rst_stat_bit and .mask_bit) for each cluster is
different. So driver data is now modified in probe, adding needed info
depending on cluster index passed from device tree.

Signed-off-by: Varada Pavani <v.pavani@xxxxxxxxxxx>
---
 drivers/watchdog/s3c2410_wdt.c | 39 +++++++++++++++++++++++++++++++++-
 1 file changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 30450e99e5e9..a112d9747ab6 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -57,6 +57,7 @@
 #define EXYNOS5_RST_STAT_REG_OFFSET		0x0404
 #define EXYNOS5_WDT_DISABLE_REG_OFFSET		0x0408
 #define EXYNOS5_WDT_MASK_RESET_REG_OFFSET	0x040c
+#define FSD_AUTOMATIC_DISABLE_WDT		0x040c
 #define EXYNOS850_CLUSTER0_NONCPU_OUT		0x1220
 #define EXYNOS850_CLUSTER0_NONCPU_INT_EN	0x1244
 #define EXYNOS850_CLUSTER1_NONCPU_OUT		0x1620
@@ -333,6 +334,33 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl1 = {
 		  QUIRK_HAS_DBGACK_BIT,
 };
 
+static const struct s3c2410_wdt_variant drv_data_fsd_cl0 = {
+	.disable_reg = FSD_AUTOMATIC_DISABLE_WDT,
+	.mask_bit = 23,
+	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
+	.rst_stat_bit = 23,
+	.quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_RST_STAT |
+		  QUIRK_HAS_PMU_AUTO_DISABLE,
+};
+
+static const struct s3c2410_wdt_variant drv_data_fsd_cl1 = {
+	.disable_reg = FSD_AUTOMATIC_DISABLE_WDT,
+	.mask_bit = 24,
+	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
+	.rst_stat_bit = 24,
+	.quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_RST_STAT |
+		  QUIRK_HAS_PMU_AUTO_DISABLE,
+};
+
+static const struct s3c2410_wdt_variant drv_data_fsd_cl2 = {
+	.disable_reg = FSD_AUTOMATIC_DISABLE_WDT,
+	.mask_bit = 25,
+	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
+	.rst_stat_bit = 25,
+	.quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_RST_STAT |
+		  QUIRK_HAS_PMU_AUTO_DISABLE,
+};
+
 static const struct of_device_id s3c2410_wdt_match[] = {
 	{ .compatible = "google,gs101-wdt",
 	  .data = &drv_data_gs101_cl0 },
@@ -352,6 +380,8 @@ static const struct of_device_id s3c2410_wdt_match[] = {
 	  .data = &drv_data_exynosautov9_cl0 },
 	{ .compatible = "samsung,exynosautov920-wdt",
 	  .data = &drv_data_exynosautov920_cl0 },
+	{ .compatible = "tesla,fsd-wdt",
+	  .data = &drv_data_fsd_cl0 },
 	{},
 };
 MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
@@ -676,7 +706,8 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt)
 	if (variant == &drv_data_exynos850_cl0 ||
 	    variant == &drv_data_exynosautov9_cl0 ||
 	    variant == &drv_data_gs101_cl0 ||
-	    variant == &drv_data_exynosautov920_cl0) {
+	    variant == &drv_data_exynosautov920_cl0 ||
+	    variant == &drv_data_fsd_cl0) {
 		u32 index;
 		int err;
 
@@ -697,6 +728,12 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt)
 				variant = &drv_data_gs101_cl1;
 			else if (variant == &drv_data_exynosautov920_cl0)
 				variant = &drv_data_exynosautov920_cl1;
+			else if (variant == &drv_data_fsd_cl0)
+				variant = &drv_data_fsd_cl1;
+			break;
+		case 2:
+			if (variant == &drv_data_fsd_cl0)
+				variant = &drv_data_fsd_cl2;
 			break;
 		default:
 			return dev_err_probe(dev, -EINVAL, "wrong cluster index: %u\n", index);
-- 
2.49.0