Required in order to have these parts work while the clock driver is enabled (without clk_ignore_unused). Signed-off-by: Alexandru Chimac <alex@xxxxxxxxx> --- arch/arm64/boot/dts/exynos/exynos9610.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi index 8ac113ceddacc30b52fa35954c85e1b8c320057d..2dc7cdda83d9357cb2a44d58d666a75674c83ec4 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi @@ -319,6 +319,9 @@ pinctrl_alive: pinctrl@11850000 { compatible = "samsung,exynos9610-pinctrl"; reg = <0x11850000 0x1000>; + clocks = <&cmu_apm CLK_GOUT_APM_APBIF_GPIO_ALIVE_PCLK>; + clock-names = "pclk"; + wakeup-interrupt-controller { compatible = "samsung,exynos9610-wakeup-eint", "samsung,exynos850-wakeup-eint", @@ -342,6 +345,9 @@ cmu_cmgp: clock-controller@11c00000 { pinctrl_cmgp: pinctrl@11c20000 { compatible = "samsung,exynos9610-pinctrl"; reg = <0x11c20000 0x1000>; + + clocks = <&cmu_cmgp CLK_GOUT_CMGP_GPIO_PCLK>; + clock-names = "pclk"; }; sysreg_core: system-controller@12010000 { @@ -385,6 +391,8 @@ gic: interrupt-controller@12300000 { <0x12306000 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + clocks = <&cmu_core CLK_GOUT_CORE_GIC_CLK>; + clock-names = "clk"; }; cmu_g2d: clock-controller@12e00000 { @@ -434,6 +442,8 @@ pinctrl_fsys: pinctrl@13490000 { compatible = "samsung,exynos9610-pinctrl"; reg = <0x13490000 0x1000>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_fsys CLK_GOUT_FSYS_GPIO_PCLK>; + clock-names = "pclk"; }; pinctrl_top: pinctrl@139b0000 { @@ -489,6 +499,8 @@ cmu_dispaud: clock-controller@14980000 { pinctrl_dispaud: pinctrl@14a60000 { compatible = "samsung,exynos9610-pinctrl"; reg = <0x14a60000 0x1000>; + clocks = <&cmu_dispaud CLK_GOUT_DISPAUD_GPIO_DISPAUD_PCLK>; + clock-names = "pclk"; }; }; -- 2.47.3