Hi Vinod,
> -----Original Message-----
> From: Vinod Koul <vkoul@xxxxxxxxxx>
> Sent: 12 August 2025 07:45 PM
> To: Pritam Manohar Sutar <pritam.sutar@xxxxxxxxxxx>
> Cc: kishon@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx;
> conor+dt@xxxxxxxxxx; alim.akhtar@xxxxxxxxxxx; andre.draszik@xxxxxxxxxx;
> peter.griffin@xxxxxxxxxx; kauschluss@xxxxxxxxxxx;
> ivo.ivanov.ivanov1@xxxxxxxxx; igor.belwon@xxxxxxxxxxxxxxxxxxxxxxxxxx;
> m.szyprowski@xxxxxxxxxxx; s.nawrocki@xxxxxxxxxxx; linux-
> phy@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-
> samsung-soc@xxxxxxxxxxxxxxx; rosa.pila@xxxxxxxxxxx;
> dev.tailor@xxxxxxxxxxx; faraz.ata@xxxxxxxxxxx;
> muhammed.ali@xxxxxxxxxxx; selvarasu.g@xxxxxxxxxxx
> Subject: Re: [PATCH v5 2/6] phy: exynos5-usbdrd: support HS phy for
> ExynosAutov920
>
> On 05-08-25, 17:22, Pritam Manohar Sutar wrote:
> > Enable UTMI+ phy support for this SoC which is very similar to what
> > the existing Exynos850 supports.
> >
> > Add required change in phy driver to support HS phy for this SoC.
> >
> > Signed-off-by: Pritam Manohar Sutar <pritam.sutar@xxxxxxxxxxx>
> > ---
> > drivers/phy/samsung/phy-exynos5-usbdrd.c | 123
> ++++++++++++++++++++
> > include/linux/soc/samsung/exynos-regs-pmu.h | 2 +
> > 2 files changed, 125 insertions(+)
> >
> > diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c
> > b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> > index dd660ebe8045..5400dd23e500 100644
> > --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
> > +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> > @@ -2054,6 +2054,126 @@ static const struct
> exynos5_usbdrd_phy_drvdata exynos990_usbdrd_phy = {
> > .n_regulators = ARRAY_SIZE(exynos5_regulator_names),
> > };
> >
> > +static int exynosautov920_usbdrd_phy_init(struct phy *phy) {
> > + struct phy_usb_instance *inst = phy_get_drvdata(phy);
> > + struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst);
> > + int ret;
> > +
> > + ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks,
> phy_drd->clks);
> > + if (ret)
> > + return ret;
> > +
> > + /* Bypass PHY isol */
> > + inst->phy_cfg->phy_isol(inst, false);
> > +
> > + /* UTMI or PIPE3 specific init */
> > + inst->phy_cfg->phy_init(phy_drd);
> > +
> > + clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks,
> > +phy_drd->clks);
> > +
> > + return 0;
> > +}
> > +
> > +static int exynosautov920_usbdrd_phy_exit(struct phy *phy) {
> > + struct phy_usb_instance *inst = phy_get_drvdata(phy);
> > + struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst);
> > + int ret = 0;
>
> Superfluous init..
>
> > +
> > + ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks,
> phy_drd->clks);
> > + if (ret)
> > + return ret;
> > +
> > + exynos850_usbdrd_phy_exit(phy);
> > +
> > + /* enable PHY isol */
> > + inst->phy_cfg->phy_isol(inst, true);
> > +
> > + clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks,
> > +phy_drd->clks);
> > +
> > + return 0;
> > +}
> > +
> > +static int exynosautov920_usbdrd_phy_power_on(struct phy *phy) {
> > + int ret;
> > + struct phy_usb_instance *inst = phy_get_drvdata(phy);
> > + struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst);
>
> Reverse chrsitmas tree pls
>
> --
> ~Vinod
Will address these comments in next version of the patch-set (v6).
Thank you.
Regards,
Pritam
