On Thu, Jul 24, 2025 at 3:13 AM Sangwook Shin <sw617.shin@xxxxxxxxxxx> wrote:
>
> Enable supported features for ExynosAutov9 SoC.
> - QUIRK_HAS_DBGACK_BIT
> - QUIRK_HAS_32BIT_MAXCNT
>
> Reviewed-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
> Signed-off-by: Sangwook Shin <sw617.shin@xxxxxxxxxxx>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> drivers/watchdog/s3c2410_wdt.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
> index 184b1ad46ca6..16a845f41e74 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -305,7 +305,8 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl0 = {
> .cnt_en_reg = EXYNOS850_CLUSTER0_NONCPU_OUT,
> .cnt_en_bit = 7,
> .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
> - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
> + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN |
> + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT,
> };
>
> static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = {
> @@ -317,7 +318,8 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = {
> .cnt_en_reg = EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT,
> .cnt_en_bit = 7,
> .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
> - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
> + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN |
> + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT,
> };
>
> static const struct s3c2410_wdt_variant drv_data_gs101_cl0 = {
> --
> 2.25.1
>
