Hi all!
This series adds the nodes to enable the watchdog and USB support for
the Exynos990 SoC.
The watchdog consists of two clusters (cl0 and cl2). Unsure why Samsung has
skipped cl1 on this SoC. Both are enabled and working - tested on a
device from the -x1s family.
The USB controller of this SoC supports full-speed, high-speed and
super-speed operation modes. Due to my inability to get any of my
Exynos990 devices to enumerate as super-speed (even under the vendor
kernels) only the UTMI+ setup is done - as such, only the high-speed
mode is enabled. Dummy regulators are used in place of PMIC provided
ones until we implement PMIC.
Changes in V2:
- reordered USB DWC3 glue node and PHY node (sorted by address).
Signed-off-by: Igor Belwon <igor.belwon@xxxxxxxxxxxxxxxxxxxxxxxxxx>
---
Igor Belwon (5):
arm64: dts: exynos990: Enable watchdog timer
arm64: dts: exynos990: Add USB nodes
arm64: dts: exynos990-x1s-common: Enable USB
arm64: dts: exynos990-c1s: Enable USB
arm64: dts: exynos990-r8s: Enable USB
arch/arm64/boot/dts/exynos/exynos990-c1s.dts | 16 +++++++
arch/arm64/boot/dts/exynos/exynos990-r8s.dts | 16 +++++++
.../boot/dts/exynos/exynos990-x1s-common.dtsi | 16 +++++++
arch/arm64/boot/dts/exynos/exynos990.dtsi | 55 ++++++++++++++++++++++
4 files changed, 103 insertions(+)
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base-commit: b551c4e2a98a177a06148cf16505643cd2108386
change-id: 20250710-resends-july-exynos990-dt-1d693ba89db9
Best regards,
--
Igor Belwon <igor.belwon@xxxxxxxxxxxxxxxxxxxxxxxxxx>
