On 10/07/2025 09:48, Arnd Bergmann wrote: > On Thu, Jul 10, 2025, at 02:20, ksk4725@xxxxxxxxxx wrote: >> From: sungminpark <smn1196@xxxxxxxxxx> >> >> Add initial device tree support for Axis ARTPEC-8 SoC and Grizzly board. >> This SoC contains four cores of cortex-a53 CPUs and other various >> peripheral IPs. > >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fa1e04e87d1d..371005f3f41a 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -2320,6 +2320,20 @@ F: drivers/crypto/axis >> F: drivers/mmc/host/usdhi6rol0.c >> F: drivers/pinctrl/pinctrl-artpec* >> >> +ARM/ARTPEC ARM64 MACHINE SUPPORT >> +M: Jesper Nilsson <jesper.nilsson@xxxxxxxx> >> +M: Ravi Patel <ravi.patel@xxxxxxxxxxx> >> +M: SeonGu Kang <ksk4725@xxxxxxxxxx> >> +M: SungMin Park <smn1196@xxxxxxxxxx> >> +L: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx (moderated for non-subscribers) >> +L: linux-samsung-soc@xxxxxxxxxxxxxxx >> +L: linux-arm-kernel@xxxxxxxx >> +S: Maintained >> +F: Documentation/devicetree/bindings/clock/axis,artpec*-clock.yaml >> +F: arch/arm64/boot/dts/axis/ >> +F: drivers/clk/samsung/clk-artpec*.c >> +F: include/dt-bindings/clock/axis,artpec*-clk.h > > I'm trying to understand the SoC family tree here. I see that > you have an entry for ARTPEC SoCs above it, which currently > covers artpec6 (Cortex-A9, apparently not Samsung based). > > Is the reason for having two entries here that artpec6/7 and > artpec8/9 are two separate SoC families, or is this just because > they are using 32-bit and 64-bit cores, respectively? These should be entirely different families. Artpec6 was not done by Samsung and this one - Artpec 8 - is basically Samsung SoC, just like they did designs for Tesla and Google GS101. I don't know about Artpec 9. All this should be explained in DTS or bindings commit msg, btw. > >> >> +config ARCH_ARTPEC >> + bool "Axis Communications ARTPEC SoC Family" >> + help >> + This enables support for the ARMv8 based ARTPEC SoC Family. >> + >> +config ARCH_ARTPEC8 >> + bool "Axis ARTPEC-8 SoC Platform" >> + depends on ARCH_ARTPEC >> + depends on ARCH_EXYNOS >> + select ARM_GIC >> + help >> + This enables support for the Axis ARTPEC-8 SoC. >> + > > I would prefer to be less fine-grained here, especially as > it seems that ARTPEC9 is again quite similar to ARTPEC8, as > far as I can guess from public information. > > Could you fold both entries into a single ARCH_ARTPEC? So far ARCH_ARTPEC = ARCH_ARTPEC8, so obviously it can be folded. I don't know if Artpec 9 will ever be upstreamed. This Artpec 8 is like 4 or 5 year effort - they sent first patches some years ago, but DTS was not ready. Therefore I think we should not assume there will be Artpec 9 yet. If it comes, we can always split things. Best regards, Krzysztof
