On Wed, Jun 25, 2025 at 10:22:26PM +0530, Shradha Todi wrote:
> Document PHY device tree bindings for Tesla FSD SoCs.
>
> Signed-off-by: Shradha Todi <shradha.t@xxxxxxxxxxx>
> ---
> .../bindings/phy/samsung,exynos-pcie-phy.yaml | 25 +++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 41df8bb08ff7..4dc20156cdde 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -15,10 +15,13 @@ properties:
> const: 0
>
> compatible:
> - const: samsung,exynos5433-pcie-phy
> + enum:
> + - samsung,exynos5433-pcie-phy
> + - tesla,fsd-pcie-phy
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> samsung,pmu-syscon:
> $ref: /schemas/types.yaml#/definitions/phandle
> @@ -30,6 +33,24 @@ properties:
> description: phandle for FSYS sysreg interface, used to control
> sysreg registers bits for PCIe PHY
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - tesla,fsd-pcie-phy
> + then:
> + description:
> + The PHY controller nodes are represented in the aliases node
> + using the following format 'pciephy{n}'. Depending on whether
> + n is 0 or 1, the phy init sequence is chosen.
What? Don't make up your own aliases.
If the PHY instances are different, then maybe you need a different
compatible. If this is just selecting the PHY mode, you can do that in
PHY cells as the mode depends on the consumer.
> + properties:
> + reg:
> + items:
> + - description: PHY
> + - description: PCS
else:
properties:
reg:
maxItems: 1
> +
> required:
> - "#phy-cells"
> - compatible
> --
> 2.49.0
>
