The ExynosAutoV9 and ExynosAutoV920 SoCs have a 32-bit counter register,
but due to code constraints, only 16-bit values could be used.
This series enables these SoCs to use the 32-bit counter.
Additionally, it addresses the issue where the ExynosAutoV9 SoC supports
the DBGACK bit but it was not set.
V2->V3:
- Correct the incorrect tag information.
- Link to v2:
https://lore.kernel.org/linux-watchdog/20250514094220.1561378-1-sw617.shin@xxxxxxxxxxx/
V1->V2:
- Modify the max_timeout calculation considering overflow
- Separate tha max_timeout calculation into a separate patch
- Add max_cnt in struct s3c2410_wdt
- Set max_cnt once in probe function
- Add patch that uses S3C2410_WTCON_PRESCALE_MAX instead of hardcoded one
- Remove unnecessary inner parentheses
- Link to v1:
https://lore.kernel.org/linux-watchdog/20250513094711.2691059-1-sw617.shin@xxxxxxxxxxx/
Sangwook Shin (5):
watchdog: s3c2410_wdt: Replace hardcoded values with macro definitions
watchdog: s3c2410_wdt: Fix max_timeout being calculated larger
watchdog: s3c2410_wdt: Increase max timeout value of watchdog
watchdog: s3c2410_wdt: exynosautov920: Enable QUIRK_HAS_32BIT_MAXCNT
watchdog: s3c2410_wdt: exynosautov9: Enable supported features
drivers/watchdog/s3c2410_wdt.c | 37 +++++++++++++++++++++++-----------
1 file changed, 25 insertions(+), 12 deletions(-)
--
2.40.1
