On 28/04/2025 10:47, Shin Son wrote: > Register compatible and cmu_info data to support clock CPUCL1/2 > (CPU Cluster 1 and CPU Cluster 2), > these provide clock for CPUCL1/2_SWTICH/CLUSTER. > > These clocks are required early during boot for the CPUs, > so they are declared using CLK_OF_DECLARE instead of being registered > through a platform driver. > > Signed-off-by: Shin Son <shin.son@xxxxxxxxxxx> > --- > drivers/clk/samsung/clk-exynosautov920.c | 208 ++++++++++++++++++++++- > 1 file changed, 207 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c > index 8021e0912e50..f8168eed4a66 100644 > --- a/drivers/clk/samsung/clk-exynosautov920.c > +++ b/drivers/clk/samsung/clk-exynosautov920.c > @@ -18,7 +18,9 @@ > > /* NOTE: Must be equal to the last clock ID increased by one */ > #define CLKS_NR_TOP (DOUT_CLKCMU_TAA_NOC + 1) > -#define CLKS_NR_CPUCL0 (CLK_DOUT_CLUSTER0_PERIPHCLK + 1) > +#define CLKS_NR_CPUCL0 (CLK_DOUT_CPUCL0_NOCP + 1) You just added that line a week ago and it is already incorrect? Then it needs patch on its own explaining what are you fixing. Best regards, Krzysztof
