Re: CAN latency measuremet on AMD/Xilinx Zynq with PREEMP_RT - added threaded NAPI configuration

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hello Pavel,

On 18.04.25 12:12, Pavel Pisa wrote:
Hello Sebastian,

On Thursday 17 of April 2025 10:12:54 Sebastian Andrzej Siewior wrote:
The IRQ thread should be limited to one CPU which is the same where the
IRQ it itself is set to. I don't think that this done the NAPI thread
automatically so it is probably free floating in the system.

you are right, I have added

   taskset -p 1 $pid

in can-latester-automation/device-scripts/set-can-threaded.sh

the effect can be seen after some days on the midnight
build and testing records.

Our system is small and simple and all CAN IRQs are
mapped to CPU0 now. But I have looked if I can find some
easy way how to find affinity of the IRQ thread from
/sys/class/net/canX and have not succeed a much.
There is queues/rx-0/rps_cpus but it is probably another
level.

There is easy way to find matching kernel driver task
and copy affinity to NAPI task. But I am not sure how
much naming match is guaranteed if some interfaces aliasing
etc. is in effect. I see next names now

   [irq/48-can2]
   [irq/49-can3]
   [irq/50-can4]
   [irq/51-can5]

and

  [napi/can2-19]
  [napi/can3-20]
  [napi/can4-21]
  [napi/can5-22]

One question to Oliver, in which thread/callaback context
is running kernel CAN gateway? I think that it does not
use separate task. Because with threaded NAPI it seems
that simple user space "gateway" (task to forward all
messages from one interface to another) has more stable
results than routing of messages directly in kernel.

The can_gw get's the CAN frames via NET_RX softirq like all other (CAN) network protocols.

The original reason for can_gw was, that an existing user space gateway was not able to cope with high CAN traffic loads due to scheduling and buffer overflows. That was with a standard kernel and might be different with PREEMPT_RT now.

Best regards,
Oliver


Some side note, project implementing FlexCAN controller
emulation for QEMU (initial target sabrelite iMX6)
is moving forward. And as Bernhard Beschow submitted
iMX8 platform support into mainline QEMU, the FlexCAN
emulation support can be extended to it in future as well.
If somebody is interested then we can somehow join
resources. Foe example if some funding is found
I would discuse if the studnet working on the thesis
project finalized by submitting iMX6 support would
be willing to continue on iMX8 or other targets support.

Best wishes,

                 Pavel Pisa
     phone:      +420 603531357
     e-mail:     pisa@xxxxxxxxxxxxxxxx
     Department of Control Engineering FEE CVUT
     Karlovo namesti 13, 121 35, Prague 2
     university: http://control.fel.cvut.cz/
     personal:   http://cmp.felk.cvut.cz/~pisa
     social:     https://social.kernel.org/ppisa
     projects:   https://www.openhub.net/accounts/ppisa
     CAN related:http://canbus.pages.fel.cvut.cz/
     RISC-V education: https://comparch.edu.cvut.cz/
     Open Technologies Research Education and Exchange Services
     https://gitlab.fel.cvut.cz/otrees/org/-/wikis/home





[Index of Archives]     [RT Stable]     [Kernel Newbies]     [IDE]     [Security]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Linux ATA RAID]     [Samba]     [Video 4 Linux]     [Device Mapper]

  Powered by Linux