On Tue, Sep 23, 2025 at 08:12:27PM +0800, zhangsenchuan@xxxxxxxxxxxxxxxxxx wrote: > Add driver for the Eswin EIC7700 PCIe host controller,the controller is > based on the DesignWare PCIe core, IP revision 6.00a The PCIe Gen.3 > controller supports a data rate of 8 GT/s and 4 channels, support INTX > and MSI interrupts. s/host controller,the controller is/host controller, which is/ Add period at end of first sentence. > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -375,6 +375,17 @@ config PCI_EXYNOS > hardware and therefore the driver re-uses the DesignWare core > functions to implement the driver. > > +config PCIE_EIC7700 > + bool "ESWIN PCIe controller" > + depends on ARCH_ESWIN || COMPILE_TEST > + depends on PCI_MSI > + select PCIE_DW_HOST > + help > + Say Y here if you want PCIe controller support for the ESWIN. > + The PCIe controller on Eswin is based on DesignWare hardware, > + enables support for the PCIe controller in the Eswin SoC to > + work in host mode. Alphabetize by vendor name so the kconfig menus stay sorted: Baikal-T1 PCIe controller ESWIN PCIe controller Freescale i.MX6/7/8 PCIe controller (host mode) > +++ b/drivers/pci/controller/dwc/pcie-eic7700.c > +/* Vendor and device id value */ > +#define VENDOR_ID_VALUE 0x1fe1 > +#define DEVICE_ID_VALUE 0x2030 Use something like this to match definitions in include/linux/pci_ids.h, where this might eventually be moved if used in other drivers: #define PCI_VENDOR_ID_ESWIN 0x1fe1 > +/* Disable MSI-X cap register fields */ > +#define PCIE_MSIX_DISABLE_MASK GENMASK(15, 8) I think this value has nothing to do with MSI-X; it's just the "Next Capability Pointer" in the capability header, i.e., the PCI_CAP_LIST_NEXT_MASK added here: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?id=37d1ade89606 That commit is queued but not merged, so you can't use it yet. If this driver is merged after v6.17, you can switch to using it. > +static int eswin_pcie_parse_ports(struct eswin_pcie *pcie) > +{ > + struct device *dev = pcie->pci.dev; > + struct eswin_pcie_port *port, *tmp; > + int ret; > + > + for_each_available_child_of_node_scoped(dev->of_node, of_port) { > + ret = eswin_pcie_parse_port(pcie, of_port); > + if (ret) > + goto err_port; > + } > + > + return ret; "ret" is potentially uninitialized here, but you never get here if eswin_pcie_parse_port() fails, so I think you should "return 0" directly instead. > +static int eswin_pcie_probe(struct platform_device *pdev) > +{ > + const struct eswin_pcie_data *data; > + struct eswin_pcie_port *port, *tmp; > + struct device *dev = &pdev->dev; > + struct eswin_pcie *pcie; > + struct dw_pcie *pci; > + int ret; > + > + data = of_device_get_match_data(dev); > + if (!data) > + return dev_err_probe(dev, -EINVAL, "OF data missing\n"); > + > + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); > + if (!pcie) > + return -ENOMEM; > + > + INIT_LIST_HEAD(&pcie->ports); > + > + pci = &pcie->pci; > + pci->dev = dev; > + pci->ops = &dw_pcie_ops; > + pci->pp.ops = &eswin_pcie_host_ops; > + pcie->msix_cap = data->msix_cap; > + > + pcie->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt"); > + if (IS_ERR(pcie->mgmt_base)) > + return dev_err_probe(dev, PTR_ERR(pcie->mgmt_base), > + "Failed to map mgmt registers\n"); > + > + pcie->powerup_rst = devm_reset_control_get(&pdev->dev, "powerup"); > + if (IS_ERR(pcie->powerup_rst)) > + return dev_err_probe(dev, PTR_ERR(pcie->powerup_rst), > + "Failed to get powerup reset\n"); > + > + pcie->cfg_rst = devm_reset_control_get(&pdev->dev, "cfg"); > + if (IS_ERR(pcie->cfg_rst)) > + return dev_err_probe(dev, PTR_ERR(pcie->cfg_rst), > + "Failed to get cfg reset\n"); > + > + ret = eswin_pcie_parse_ports(pcie); > + if (ret) > + dev_err_probe(pci->dev, ret, > + "Failed to parse Root Port: %d\n", ret); > + > + platform_set_drvdata(pdev, pcie); > + > + ret = dw_pcie_host_init(&pci->pp); > + if (ret) { > + dev_err(dev, "Failed to initialize host\n"); > + goto err_init; > + } > + > + return ret; Can "return 0" here since we know the value. > +err_init: > + list_for_each_entry_safe(port, tmp, &pcie->ports, list) { > + list_del(&port->list); > + reset_control_put(port->perst); > + } > + return ret; > +} > + > +static int eswin_pcie_suspend(struct device *dev) > +{ > + struct eswin_pcie *pcie = dev_get_drvdata(dev); > + struct eswin_pcie_port *port; > + > + /* > + * For controllers with active devices, resources are retained and > + * cannot be turned off. > + */ > + if (!dw_pcie_link_up(&pcie->pci)) { > + list_for_each_entry(port, &pcie->ports, list) > + reset_control_assert(port->perst); > + eswin_pcie_assert(pcie); > + clk_bulk_disable_unprepare(pcie->num_clks, pcie->clks); > + pcie->suspended = true; I'm a little dubious about this since none of the other drivers check dw_pcie_link_up(). It also seems a little bit racy since dw_pcie_link_up() can always change after it's called. And tracking pcie->suspended is also unusual if not unique. Should dw_pcie_suspend_noirq() and dw_pcie_resume_noirq() be used here? > + } > + > + return 0; > +} > + > +static int eswin_pcie_resume(struct device *dev) > +{ > + struct eswin_pcie *pcie = dev_get_drvdata(dev); > + int ret; > + > + if (!pcie->suspended) > + return 0; > + > + ret = eswin_pcie_host_init(&pcie->pci.pp); > + if (ret) { > + dev_err(dev, "Failed to init host: %d\n", ret); > + return ret; > + } > + > + dw_pcie_setup_rc(&pcie->pci.pp); > + eswin_pcie_start_link(&pcie->pci); > + dw_pcie_wait_for_link(&pcie->pci); > + > + pcie->suspended = false; > + > + return 0; > +} > + > +static const struct dev_pm_ops eswin_pcie_pm_ops = { > + NOIRQ_SYSTEM_SLEEP_PM_OPS(eswin_pcie_suspend, eswin_pcie_resume) Suggest adding "_noirq" to the end of these function names since this sets .suspend_noirq, .resume_noirq, etc. Also will match other drivers.
