From: Manikandan K Pillai <mpillai@xxxxxxxxxxx>
Update the PCIe Cadence platform to use register offsets that
are passed during probe of the platform.
Signed-off-by: Manikandan K Pillai <mpillai@xxxxxxxxxxx>
Co-developed-by: Hans Zhang <hans.zhang@xxxxxxxxxxx>
Signed-off-by: Hans Zhang <hans.zhang@xxxxxxxxxxx>
---
drivers/pci/controller/cadence/pcie-cadence-plat.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/pci/controller/cadence/pcie-cadence-plat.c b/drivers/pci/controller/cadence/pcie-cadence-plat.c
index b067a3296dd3..927ab5b8477c 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-plat.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-plat.c
@@ -31,6 +31,7 @@ static u64 cdns_plat_cpu_addr_fixup(struct cdns_pcie *pcie, u64 cpu_addr)
static const struct cdns_pcie_ops cdns_plat_ops = {
.cpu_addr_fixup = cdns_plat_cpu_addr_fixup,
+ .link_up = cdns_pcie_linkup,
};
static int cdns_plat_pcie_probe(struct platform_device *pdev)
@@ -68,6 +69,11 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
rc = pci_host_bridge_priv(bridge);
rc->pcie.dev = dev;
rc->pcie.ops = &cdns_plat_ops;
+ rc->pcie.is_rc = data->is_rc;
+
+ /* Store the register bank offsets pointer */
+ rc->pcie.cdns_pcie_reg_offsets = data;
+
cdns_plat_pcie->pcie = &rc->pcie;
ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
@@ -95,6 +101,11 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
ep->pcie.dev = dev;
ep->pcie.ops = &cdns_plat_ops;
+ ep->pcie.is_rc = data->is_rc;
+
+ /* Store the register bank offset pointer */
+ ep->pcie.cdns_pcie_reg_offsets = data;
+
cdns_plat_pcie->pcie = &ep->pcie;
ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
--
2.49.0
