On Thu, Aug 07, 2025 at 06:15:12PM GMT, Jim Quinlan wrote:
> In a future commit, a new handler will be introduced that in part does
> reads and writes to some of the PCIe registers. When this handler is
> invoked, it is paramount that it does not do these register accesses when
> the PCIe bridge is inactive, as this will cause CPU abort errors.
>
> To solve this we keep a spinlock that guards a variable which indicates
> whether the bridge is on or off. When the bridge is on, access of the PCIe
> HW registers may proceed.
>
> Since there are multiple ways to reset the bridge, we introduce a general
> function to obtain the spinlock, call the specific function that is used
> for the specific SoC, sets the bridge active indicator variable, and
> releases the spinlock.
>
> Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>
> ---
> drivers/pci/controller/pcie-brcmstb.c | 51 +++++++++++++++++++++------
> 1 file changed, 40 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index 9afbd02ded35..ceb431a252b7 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -30,6 +30,7 @@
> #include <linux/reset.h>
> #include <linux/sizes.h>
> #include <linux/slab.h>
> +#include <linux/spinlock.h>
> #include <linux/string.h>
> #include <linux/types.h>
>
> @@ -259,6 +260,7 @@ struct pcie_cfg_data {
> int (*perst_set)(struct brcm_pcie *pcie, u32 val);
> int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> int (*post_setup)(struct brcm_pcie *pcie);
> + bool has_err_report;
> };
>
> struct subdev_regulators {
> @@ -303,6 +305,8 @@ struct brcm_pcie {
> struct subdev_regulators *sr;
> bool ep_wakeup_capable;
> const struct pcie_cfg_data *cfg;
> + bool bridge_on;
> + spinlock_t bridge_lock;
> };
>
> static inline bool is_bmips(const struct brcm_pcie *pcie)
> @@ -310,6 +314,24 @@ static inline bool is_bmips(const struct brcm_pcie *pcie)
> return pcie->cfg->soc_base == BCM7435 || pcie->cfg->soc_base == BCM7425;
> }
>
> +static inline int brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val)
No need to specify 'inline' keyword.
> +{
> + unsigned long flags;
> + int ret;
> +
> + if (pcie->cfg->has_err_report)
> + spin_lock_irqsave(&pcie->bridge_lock, flags);
> +
> + ret = pcie->cfg->bridge_sw_init_set(pcie, val);
> + /* If we fail, assume the bridge is in reset (off) */
> + pcie->bridge_on = ret ? false : !val;
s/bridge_on/bridge_in_reset
This callback is not necessarily turning the bridge ON/OFF.
> +
> + if (pcie->cfg->has_err_report)
> + spin_unlock_irqrestore(&pcie->bridge_lock, flags);
> +
> + return ret;
> +}
> +
> /*
> * This is to convert the size of the inbound "BAR" region to the
> * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE
> @@ -756,9 +778,8 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus,
>
> static int brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> {
> - u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> - u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
> - int ret = 0;
> + u32 tmp;
> + int ret;
>
> if (pcie->bridge_reset) {
> if (val)
> @@ -774,10 +795,10 @@ static int brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> }
>
> tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> - tmp = (tmp & ~mask) | ((val << shift) & mask);
> + u32p_replace_bits(&tmp, val, RGR1_SW_INIT_1_INIT_GENERIC_MASK);
This change doesn't belong to this patch.
> writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
>
> - return ret;
> + return 0;
> }
>
> static int brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val)
> @@ -1081,7 +1102,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
> int memc, ret;
>
> /* Reset the bridge */
> - ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
> + ret = brcm_pcie_bridge_sw_init_set(pcie, 1);
> if (ret)
> return ret;
>
> @@ -1097,7 +1118,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
> usleep_range(100, 200);
>
> /* Take the bridge out of reset */
> - ret = pcie->cfg->bridge_sw_init_set(pcie, 0);
> + ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
> if (ret)
> return ret;
>
> @@ -1565,7 +1586,7 @@ static int brcm_pcie_turn_off(struct brcm_pcie *pcie)
>
> if (!(pcie->cfg->quirks & CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN))
> /* Shutdown PCIe bridge */
> - ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
> + ret = brcm_pcie_bridge_sw_init_set(pcie, 1);
>
> return ret;
> }
> @@ -1653,7 +1674,9 @@ static int brcm_pcie_resume_noirq(struct device *dev)
> goto err_reset;
>
> /* Take bridge out of reset so we can access the SERDES reg */
> - pcie->cfg->bridge_sw_init_set(pcie, 0);
> + ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
> + if (ret)
> + goto err_reset;
>
> /* SERDES_IDDQ = 0 */
> tmp = readl(base + HARD_DEBUG(pcie));
> @@ -1921,7 +1944,10 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> if (ret)
> return dev_err_probe(&pdev->dev, ret, "could not enable clock\n");
>
> - pcie->cfg->bridge_sw_init_set(pcie, 0);
> + ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret,
> + "could not un-reset the bridge\n");
I believe Bjorn asked you to change this error message to:
'could not deassert the bridge' or similar, but you ended up changing the
unrelated error message below.
- Mani
--
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