Cc: Dave On Wed, Jul 30, 2025 at 11:50 PM Ben Cheatham <Benjamin.Cheatham@xxxxxxx> wrote: > > Add CXL Timeout and Isolation _OSC support and control fields, as > defined in the ECN at the link below. The ECN contents are expected to > appear in the CXL 4.0 specification. The link is only accessible to CXL > SSWG members, so a brief overview is provided here: > > The ECN adds several fields to the CXL _OSC method (CXL 3.2 9.18.2) > for the purpose of reserving CXL isolation features for the platform > firmware's use. The fields introduced for kernel support reserve > toggling the CXL.mem isolation enable bit in the isolation control > register (CXL 3.2 8.2.4.24.2) and how the host is notified isolation has > occurred. > > These fields will be used by the CXL driver to enable CXL isolation > according to the result of the handshake. Descriptions of these fields > are included in the commit messages of the commits where they are used. > > Link: https://members.computeexpresslink.org/wg/software_systems/document/3118 > Signed-off-by: Ben Cheatham <Benjamin.Cheatham@xxxxxxx> In case you need this Acked-by: Rafael J. Wysocki (Intel) <rafael@xxxxxxxxxx> > --- > drivers/acpi/pci_root.c | 9 +++++++++ > include/linux/acpi.h | 3 +++ > 2 files changed, 12 insertions(+) > > diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c > index 74ade4160314..33a922e160fc 100644 > --- a/drivers/acpi/pci_root.c > +++ b/drivers/acpi/pci_root.c > @@ -145,10 +145,13 @@ static struct pci_osc_bit_struct cxl_osc_support_bit[] = { > { OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT, "CXL20PortDevRegAccess" }, > { OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT, "CXLProtocolErrorReporting" }, > { OSC_CXL_NATIVE_HP_SUPPORT, "CXLNativeHotPlug" }, > + { OSC_CXL_TIMEOUT_ISOLATION_SUPPORT, "CXLTimeoutIsolation" }, > }; > > static struct pci_osc_bit_struct cxl_osc_control_bit[] = { > { OSC_CXL_ERROR_REPORTING_CONTROL, "CXLMemErrorReporting" }, > + { OSC_CXL_MEM_ISOLATION_CONTROL, "CXLMemIsolation" }, > + { OSC_CXL_ISOLATION_NOTIF_CONTROL, "CXLIsolationNotifications" }, > }; > > static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, > @@ -493,6 +496,8 @@ static u32 calculate_cxl_support(void) > support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT; > if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) > support |= OSC_CXL_NATIVE_HP_SUPPORT; > + if (IS_ENABLED(CONFIG_CXL_ISOLATION)) > + support |= OSC_CXL_TIMEOUT_ISOLATION_SUPPORT; > > return support; > } > @@ -535,6 +540,10 @@ static u32 calculate_cxl_control(void) > if (IS_ENABLED(CONFIG_MEMORY_FAILURE)) > control |= OSC_CXL_ERROR_REPORTING_CONTROL; > > + if (IS_ENABLED(CONFIG_CXL_ISOLATION)) > + control |= (OSC_CXL_MEM_ISOLATION_CONTROL | > + OSC_CXL_ISOLATION_NOTIF_CONTROL); > + > return control; > } > > diff --git a/include/linux/acpi.h b/include/linux/acpi.h > index f102c0fe3431..f172182aa029 100644 > --- a/include/linux/acpi.h > +++ b/include/linux/acpi.h > @@ -626,9 +626,12 @@ extern u32 osc_sb_native_usb4_control; > #define OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT 0x00000002 > #define OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT 0x00000004 > #define OSC_CXL_NATIVE_HP_SUPPORT 0x00000008 > +#define OSC_CXL_TIMEOUT_ISOLATION_SUPPORT 0x00000010 > > /* CXL _OSC: Capabilities DWORD 5: Control Field */ > #define OSC_CXL_ERROR_REPORTING_CONTROL 0x00000001 > +#define OSC_CXL_MEM_ISOLATION_CONTROL 0x00000002 > +#define OSC_CXL_ISOLATION_NOTIF_CONTROL 0x00000020 > > static inline u32 acpi_osc_ctx_get_pci_control(struct acpi_osc_context *context) > { > --
