On Tuesday 26 August 2025 17:07:38 Rostyslav Khudolii wrote: > > > > Hello Rostyslav, I would like to remind the previous email. > > I still do not know which bit in D18F4x044 represents the > > EnableCF8ExtCfg config. > > > > Hi Pali, > > Sorry for the late reply again. So in D18F4x044: > - bit 0. EnableCf8ExtCfg. Enable PCI extended configuration register > access for CFC/CF8 > accesses; > - bit 1. DisPciCfgReg. Disable CFC/CF8 Accesses to IO space. When set > to 1, CFC/CF8 accesses are treated as > PCI IO space accesses and not PCI configuration accesses. > > Unfortunately, I don't know if this also applies to later families. Thank you very much for the info. I was missing the information about the bit 0 offset.
