CXL RAS compilation is enabled using CONFIG_CXL_RAS while the AER CXL logic uses CONFIG_PCIEAER_CXL. The 2 share the same dependencies and can be combined. The 2 kernel configs are unnecessary and are problematic for the user because of the duplication. Replace occurrences of CONFIG_PCIEAER_CXL to be CONFIG_CXL_RAS. Update the CONFIG_CXL_RAS Kconfig definition to include dependencies 'PCIEAER && CXL_PCI' taken from the CONFIG_PCIEAER_CXL definition. Remove the Kconfig CONFIG_PCIEAER_CXL definition. Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx> --- Changes in v10 -> v11: - New patch --- drivers/pci/pcie/Kconfig | 9 --------- drivers/pci/pcie/aer.c | 2 +- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig index 17919b99fa66..207c2deae35f 100644 --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig @@ -49,15 +49,6 @@ config PCIEAER_INJECT gotten from: https://github.com/intel/aer-inject.git -config PCIEAER_CXL - bool "PCI Express CXL RAS support" - default y - depends on PCIEAER && CXL_PCI - help - Enables CXL error handling. - - If unsure, say Y. - # # PCI Express ECRC # diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 70ac66188367..7fe9f883f5c5 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1086,7 +1086,7 @@ static bool find_source_device(struct pci_dev *parent, return true; } -#ifdef CONFIG_PCIEAER_CXL +#ifdef CONFIG_CXL_RAS /** * pci_aer_unmask_internal_errors - unmask internal errors -- 2.51.0.rc2.21.ge5ab6b3e5a
