On i.MX, PCIe has two reference clock inputs: one from the internal PLL
and one from an external clock source. Only one needs to be used,
depending on the board design. Add the external reference clock source
for reference clock.
Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index ca5f2970f217..6be45abe6e52 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -219,7 +219,12 @@ allOf:
- const: pcie_bus
- const: pcie_phy
- const: pcie_aux
- - const: ref
+ - description: PCIe reference clock.
+ oneOf:
+ - description: The controller has two reference clock
+ inputs, internal system PLL and external clock
+ source. Only one needs to be used.
+ enum: [ref, extref]
unevaluatedProperties: false
--
2.37.1
