This series introduces a PHY driver and a PCIe driver to support PCIe on the SpacemiT K1 SoC. The PCIe implementation is derived from a Synopsys DesignWare PCIe IP. The PHY driver supports one combination PCIe/USB PHY as well as two PCIe-only PHYs. The combo PHY port uses one PCIe lane, and the other two ports each have two lanes. All PCIe ports operate at 5 GT/second. The PCIe PHYs must be configured using a value that can only be determined using the combo PHY, operating in PCIe mode. To allow that PHY to be used for USB, the calibration step is performed by the PHY driver automatically at probe time. Once this step is done, the PHY can be used for either PCIe or USB. -Alex Alex Elder (6): dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY dt-bindings: phy: spacemit: introduce PCIe PHY dt-bindings: phy: spacemit: introduce PCIe root complex phy: spacemit: introduce PCIe/combo PHY PCI: spacemit: introduce SpacemiT PCIe host driver riscv: dts: spacemit: PCIe and PHY-related updates .../bindings/pci/spacemit,k1-pcie-rc.yaml | 141 ++++ .../bindings/phy/spacemit,k1-combo-phy.yaml | 110 +++ .../bindings/phy/spacemit,k1-pcie-phy.yaml | 49 ++ .../boot/dts/spacemit/k1-bananapi-f3.dts | 28 + arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 33 + arch/riscv/boot/dts/spacemit/k1.dtsi | 169 +++++ drivers/pci/controller/dwc/Kconfig | 10 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-k1.c | 355 ++++++++++ drivers/phy/Kconfig | 11 + drivers/phy/Makefile | 1 + drivers/phy/phy-spacemit-k1-pcie.c | 639 ++++++++++++++++++ 12 files changed, 1547 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/spacemit,k1-pcie-rc.yaml create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml create mode 100644 drivers/pci/controller/dwc/pcie-k1.c create mode 100644 drivers/phy/phy-spacemit-k1-pcie.c base-commit: 8f5ae30d69d7543eee0d70083daf4de8fe15d585 -- 2.48.1
