On Tue, 22 Jul 2025 17:11:48 +0800, Wenbin Yao wrote: > The first patch enables the PCI Power Control driver to control the power > state of PCI slots. The second patch adds the bus topology of PCIe domain 3 > on x1e80100 platform. The third patch adds perst, wake and clkreq sideband > signals, and describe the regulators powering the rails of the PCI slots in > the devicetree for PCIe3 controller and PHY device. > > The patchset has been modified based on comments and suggestions. > > [...] Applied, thanks! [2/3] arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 commit: 6facfaff0fe3b4d5903bed6164eb5e60ee6cdb8f [3/3] arm64: dts: qcom: x1e80100-qcp: enable pcie3 x8 slot for X1E80100-QCP commit: df758a868dbc90cae98044d52a9d753575f50cfa Best regards, -- Bjorn Andersson <andersson@xxxxxxxxxx>