On Thu, Jul 03, 2025 at 12:25:11PM +0200, Lorenzo Pieralisi wrote: > The GICv5 Interrupt Routing Service (IRS) component implements > interrupt management and routing in the GICv5 architecture. > > A GICv5 system comprises one or more IRSes, that together > handle the interrupt routing and state for the system. > > An IRS supports Shared Peripheral Interrupts (SPIs), that are > interrupt sources directly connected to the IRS; they do not > rely on memory for storage. The number of supported SPIs is > fixed for a given implementation and can be probed through IRS > IDR registers. > > SPI interrupt state and routing are managed through GICv5 > instructions. > > Each core (PE in GICv5 terms) in a GICv5 system is identified with > an Interrupt AFFinity ID (IAFFID). > > An IRS manages a set of cores that are connected to it. > > Firmware provides a topology description that the driver uses > to detect to which IRS a CPU (ie an IAFFID) is associated with. > > Use probeable information and firmware description to initialize > the IRSes and implement GICv5 IRS SPIs support through an > SPI-specific IRQ domain. > > The GICv5 IRS driver: > > - Probes IRSes in the system to detect SPI ranges > - Associates an IRS with a set of cores connected to it > - Adds an IRQchip structure for SPI handling > > SPIs priority is set to a value corresponding to the lowest > permissible priority in the system (taking into account the > implemented priority bits of the IRS and CPU interface). > > Since all IRQs are set to the same priority value, the value > itself does not matter as long as it is a valid one. > > Co-developed-by: Sascha Bischoff <sascha.bischoff@xxxxxxx> > Signed-off-by: Sascha Bischoff <sascha.bischoff@xxxxxxx> > Co-developed-by: Timothy Hayes <timothy.hayes@xxxxxxx> > Signed-off-by: Timothy Hayes <timothy.hayes@xxxxxxx> > Signed-off-by: Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx> > Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx> > Cc: Will Deacon <will@xxxxxxxxxx> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > Cc: Marc Zyngier <maz@xxxxxxxxxx> Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx>
