From: Florian Fainelli <f.fainelli@xxxxxxxxx> On Mon, 23 Jun 2025 23:46:28 +0200, Andrea della Porta <andrea.porta@xxxxxxxx> wrote: > The RP1 clock generator driver currently defines only the fundamental > clocks such as the front PLLs for system, audio and video subsystems > and the ethernet clock. > > Add the remaining clocks to the tree so as to be completed, which means > that the following RP1 peripherals could now consume their specific clocks > and be enabled to work (provided that the relevant driver changes for each > specific peripheral, if any, are committed): > > - ADC > - Audio IN/OUT > - DMA controller > - I2S > - MIPI DPI/DSI > - PWM > - SDIO > - UART > - Video Encoder > > Signed-off-by: Andrea della Porta <andrea.porta@xxxxxxxx> > --- Applied to https://github.com/Broadcom/stblinux/commits/drivers/next, thanks! -- Florian
