RE: [PATCH v5 01/14] dt-bindings: pci: cadence: Extend compatible for new RP configuration

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>EXTERNAL MAIL
>
>
>
>
>On 2025/6/30 15:30, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL
>>
>> On Mon, Jun 30, 2025 at 12:15:48PM +0800, hans.zhang@xxxxxxxxxxx wrote:
>>> From: Manikandan K Pillai <mpillai@xxxxxxxxxxx>
>>>
>>> Document the compatible property for HPA (High Performance
>Architecture)
>>> PCIe controller RP configuration.
>>
>> I don't see Conor's comment addressed:
>>
>> https://urldefense.com/v3/__https://lore.kernel.org/linux-
>devicetree/20250424-elm-magma-
>b791798477ab@spud/__;!!EHscmS1ygiU1lA!Bo-
>ayMVqCWXSbSgFpsBZzgk1ADft8pqRQbuOeAhIuAjz0zI015s4dmzxgaWKycqKMn
>1cejS8kKZvjF5xDAse$
>>
>> You cannot just send someone's work and bypassing the review feedback.

I thought the comment was implicitly addressed when the device drivers were separated out based on other review comments in this patch.
To make it more clear, in the next patch I will add the following description for the dt-binding patch

"The High performance architecture is different from legacy architecture controller in design of register banks, 
register definitions, hardware sequences of initialization and is considered as a different device due to the 
large number of changes required in the device driver and hence adding a new compatible."


>>
>>>
>>> Signed-off-by: Manikandan K Pillai <mpillai@xxxxxxxxxxx>
>>
>> SoB.
>
>Dear Krzysztof,
>
>Thank you very much for your reply. The questions mentioned above,
>please answer by Manikandan.
>
>Sorry, I missed it. Will add:
>Signed-off-by: Hans Zhang <hans.zhang@xxxxxxxxxxx>
>
>Best regards,
>Hans
>
>>
>> Best regards,
>> Krzysztof
>>




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