On Wed, Jun 25, 2025 at 10:22:25PM +0530, Shradha Todi wrote: > Document the PCIe controller device tree bindings for Tesla FSD > SoC for both RC and EP. > +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml > - clocks: > - items: > - - description: PCIe bridge clock > - - description: PCIe bus clock > - vdd10-supply: > - description: > - Phandle to a regulator that provides 1.0V power to the PCIe block. > - > - vdd18-supply: > - description: > - Phandle to a regulator that provides 1.8V power to the PCIe block. > + - description: pcie bridge clock > + - description: pcie bus clock Gratuitous "PCIe" capitalization changes here and in supplies below. This is just plain English text so we can use English conventions. > + vdd10-supply: > + description: > + phandle to a regulator that provides 1.0v power to the pcie block. > + > + vdd18-supply: > + description: > + phandle to a regulator that provides 1.8v power to the pcie block. I *would* be OK if you dropped the periods at the end of these, which would make them match the other descriptions in this binding. > +++ b/Documentation/devicetree/bindings/pci/tesla,fsd-pcie-ep.yaml I'm not sure about the "tesla,fsd-pcie-ep.yaml" filename. I see that it currently only describes a tesla endpoint, but it seems like maybe this should be parallel to the "samsung,exynos-pcie.yaml" host controller binding. Bjorn
