Add support for the `reset-gpios` property in the PCIe Root Port (RP)
child node to handle the PERST# signal via GPIO. Update the example
to reflect this addition.
Signed-off-by: Sai Krishna Musham <sai.krishna.musham@xxxxxxx>
---
Changes in v3:
- Move reset-gpios to PCI bridge node.
Changes in v2:
- Update commit message
---
.../bindings/pci/amd,versal2-mdb-host.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
index 43dc2585c237..3ffe4512650d 100644
--- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
+++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
@@ -71,6 +71,21 @@ properties:
- "#address-cells"
- "#interrupt-cells"
+patternProperties:
+ '^pcie@[0-2],0$':
+ type: object
+ $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+
+ reset-gpios:
+ description: GPIO controlled connection to PERST# signal
+ maxItems: 1
+
+ unevaluatedProperties: false
+
required:
- reg
- reg-names
@@ -87,6 +102,7 @@ examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/gpio/gpio.h>
soc {
#address-cells = <2>;
@@ -112,6 +128,16 @@ examples:
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
+
+ pcie@0,0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+
pcie_intc_0: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
--
2.43.0
