On Thu, 29 May 2025 11:56:29 +0800, Ziyue Zhang wrote: > This series depend on the sa8775p gcc_aux_clock and link_down reset change > https://lore.kernel.org/all/20250529035416.4159963-1-quic_ziyuzhan@xxxxxxxxxxx/ > > This series adds document, phy, configs support for PCIe in QCS8300. > It also adds 'link_down' reset for sa8775p. > > Have follwing changes: > - Add dedicated schema for the PCIe controllers found on QCS8300. > - Add compatible for qcs8300 platform. > - Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence. > - Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence. > > [...] Applied, thanks! [2/6] dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300 commit: be84da3e19666da5c43c5c4ad86eff456510bd77 Best regards, -- Manivannan Sadhasivam <mani@xxxxxxxxxx>
