On Tue, Jun 17, 2025 at 03:10:27PM +0200, Andrea della Porta wrote: > The RP1 clock generator driver currently defines only the fundamental > clocks such as the front PLLs for system, audio and video subsystems > and the ethernet clock. > > Add the remaining clocks to the tree so as to be completed. In subject, s/ramaining/remaining/ I guess we actually get some functional benefit here (something that previously did not work, will start working after this patch)? It would be good to mention that here. "Completing the tree" sounds nice, but if I were being asked to merge this, I'd like to know what benefit it brings. Bjorn
