On Fri, Jun 13, 2025 at 11:29:59AM +0800, Jacky Chou wrote:
> The AST2600 has one PCIe RC, and add the relative configure regmap.
> + pcie0: pcie@1e7700c0 {
> + compatible = "aspeed,ast2600-pcie";
> + device_type = "pci";
> + reg = <0x1e7700c0 0x40>;
> + linux,pci-domain = <0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + bus-range = <0x80 0xff>;
> +
> + ranges = <0x01000000 0x0 0x00018000 0x00018000 0x0 0x00008000
> + 0x02000000 0x0 0x70000000 0x70000000 0x0 0x10000000>;
> +
> + status = "disabled";
> +
> + resets = <&syscon ASPEED_RESET_H2X>,
> + <&syscon ASPEED_RESET_PCIE_RC_O>;
> + reset-names = "h2x", "perst";
PERST# is clearly a per-Root Port item since it's a signal on the PCIe
connector. Can you separate this and any other per-Root Port things
into a Root Port stanza to leave open the possibility of future
hardware that supports multiple Root Ports in the RC?
> + clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcierc1_default>;
> +
> + #interrupt-cells = <1>;
> + msi-parent = <&pcie0>;
> + msi-controller;
> + msi_address = <0x1e77005c>;
> +
> + aspeed,ahbc = <&ahbc>;
> + aspeed,pciecfg = <&pcie_cfg>;
> + aspeed,pciephy = <&pcie_phy1>;
> +
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &pcie_intc0 0>,
> + <0 0 0 2 &pcie_intc0 1>,
> + <0 0 0 3 &pcie_intc0 2>,
> + <0 0 0 4 &pcie_intc0 3>;
> + pcie_intc0: interrupt-controller {
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + };
> + };
> +
> gfx: display@1e6e6000 {
> compatible = "aspeed,ast2600-gfx", "syscon";
> reg = <0x1e6e6000 0x1000>;
> --
> 2.43.0
>
