On 13/06/2025 05:29, Jacky Chou wrote:
> Add pinctrl support for PCIe RC PERST pin.
>
> Signed-off-by: Jacky Chou <jacky_chou@xxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> index 289668f051eb..a93e15c64a4b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> @@ -2,6 +2,11 @@
> // Copyright 2019 IBM Corp.
>
> &pinctrl {
> + pinctrl_pcierc1_default: pcierc1_default {
No underscores in node names. Follow finally DTS coding style. You have
been told that in previous patchsets already.
Best regards,
Krzysztof
